TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 307

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

No. Symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
4.3
Note: Symbol x in the above table means the period of clock f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
FPH
AC
CAR
CAW
AD
RD
RR
HR
WW
DW
WD
SBA
SWP
SBW
SAS
SWR
SDS
SDH
AW
CW
APH
APH2
APO
AC Characteristics
for CPU core. The period of f
high-/low-frequency oscillator.
AC measuring conditions
•
•
f
A0 to A23 valid →
A0 to A23 valid → D0 to D15 input
D0 to D15 valid →
Data byte control access time for SRAM
Write pulse width for SRAM
Data byte control to end of write for SRAM
Address setup time for SRAM
Write recovery time for SRAM
Data setup time for SRAM
Data hold time for SRAM
A0 to A23 valid →
A0 to A23 valid → PORT input
A0 to A23 valid → PORT hold
A0 to A23 valid → PORT valid
RD
RD
RD
RD
RD
FPH
WR
WR
WR
Output Level: High = 0.7 Vcc, Low = 0.3 Vcc, CL = 50 pF
Input Level: High = 0.9 Vcc, Low = 0.1 Vcc
/
rise → A0 to A23 hold
fall → D0 to D15 input
low width
rise → D0 to D15 hold
period (= x)
rise → A0 to A23 hold
low width
WR
rise → D0 to D15 hold
fall
Parameter
→
RD
WR
WAIT
WAIT
/
WR
rise
input
hold
fall
(1 + N) wait
(1 + N) wait
FPH
91C820A-305
depends on the clock gear setting or the selection of
2.5x − 15
1.5x − 35
1.5x − 35
0.5x − 13
0.5x − 13
0.5x −13
2.5x + 0
2x − 15
2x − 15
3x − 25
2x − 35
x − 23
x − 13
x − 25
Min
27.7
3.5x
0
Variable
FPH
3.5x − 24
2.5x − 24
3.5x − 60
3.5x − 89
3.5x + 60
3x − 39
31250
Max
, it’s half period of the system clock f
Vcc = 2.7 to 3.6 V case of f
Vcc = 3.0 to 3.6 V case of f
129.5
Min
77.5
20.5
20.5
92.5
f
5.5
5.5
5.5
37
14
24
59
12
59
86
39
FPH
0
MHz
= 27
105.5
189.5
Max
68.5
69.5
40.5
72
54.25
69.25
96.95
Min
27.7
0.85
14.7
40.4
40.4
58.1
6.55
0.85
20.4
0.85
f
4.7
5.5
2.7
FPH
0
MHz
TMP91C820A
= 36
FPH
FPH
72.95
45.25
36.95
156.9
2008-02-20
Max
44.1
7.95
= 27 MHz
= 36 MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYS