TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 299

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

Note: As described above, whenever 0 is written to TB0MOD<TB0CP0I>, the current value in the up counter is loaded into capture
Note: The 1, 4 and 5 of TB0RUN are read as undefined value.
TB0RUN
(0180H)
TB0MOD
(0182H)
Prohibit
read-
modify-
write
3.17.3
register TB0CP0. However, note that the current value in the up counter is also loaded into capture register TB0CP0 when 1 is
written to TB0MOD<TB0CP0I> while this bit is holding 0.
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
SFRs
Double
buffer
0: Disable
1: Enable
Always write “00”.
TB0RDE
R/W
7
7
0
−
0
R/W
Always
fixed to
“0”.
R/W
6
6
−
0
−
0
Figure 3.17.2 Register for TMRB
Figure 3.17.3 Register for TMRB
Execute
software
capture
0: Execute
1: Undefined
TB0CP01
TMRB0 Mode Register
W*
TMRB0 Run Register
5
5
1
91C820A-297
Always write “00”.
R/W
4
4
−
0
TMRB0 source clock
Up counter clear control
Software capture
00
01
10
11
0
1
0
1
IDLE2
0: Stop
1: Operate
I2TB0
R/W
R/W
Reserved
φT1
φT4
φT16
Disable
TB0RG1 clearing on match with TB0RG1.
The value in the up counter is captured to TB0CP0.
Undefined (Note)
3
0
3
−
0
I2TB0: Operation during IDLE2 mode
TB0PRUN: Operation of prescaler
TB0RUN: Operation of TMRB0
16-Bit timer run/stop control
0: Stop and clear
1: Run (Count up)
Control up
counter
0: Disable
1: Enable
TB0PRUN
TB0CLE
R/W
clearing
clearing
2
0
2
0
TMRB0 source clock
00: Reserved
01: φT1
10: φT4
11: φT16
TB0CLK1
Count operation
R/W
0
1
1
1
0
Stop and clear
Count
TB0RUN
TMP91C820A
TB0CLK0
R/W
0
0
2008-02-20
0
0