TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 172

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

TXD
Note: The TXD pin of each slave controller must be in open-drain output mode.
(4) Mode 3 (9-bit UART mode)
Master
Wakeup function
bit cannot be added.
case of receiving it is stored in SC0CR<RB8>. When the buffer is written and read, the
MSB is read or written first, before the rest of the SC0BUF data.
SC0MOD0<WU> to 1. The interrupt INTRX0 occurs only when<RB8> = 1.
9-bit UART mode is selected by setting SC0MOD0<SM1:0> to 11. In this mode parity
In the case of transmission the MSB (9th bit) is written to SC0MOD0<TB8>. In the
In 9-bit UART mode, the wakeup function for slave controllers is enabled by setting
X: Don’t care, −: No change
PCCR
SC0MOD
SC0CR
BR0CR
INTES0
Acc
Main settings
Interrupt processing
Acc
if Acc
RXD
* Clock state
Figure 3.9.29 Serial Link Using Wakeup Function
← − − − − − − 0 −
← − 0 1 X 1 0 0 1
← X 0 1 X X X 0 0
← 0 0 0 1 0 1 0 1
← − − − − 1 1 0 0
← SC0BUF
← SC0CR AND 00011100
≠ 0 then ERROR
TXD
7 6 5 4 3 2 1 0
Slave 1
91C820A-170
RXD
TXD
System clock:
Clock gear:
Prescaler clock: System clock
Set PC1 to function as the RXD0 pin.
Enable receiving in 8-bit UART mode.
Add even parity.
Set the transfer rate to 9600 bps.
Enable the INTRX0 interrupt and set it to interrupt level 4.
Read the received data.
Check for errors.
Slave 2
RXD
High frequency (fc)
1 (fc)
TXD
Slave 3
TMP91C820A
RXD
2008-02-20