TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 206

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

Analog input
AN3/ADTRG (P83)
3.11 Analog/Digital Converter
AN7 (P87)
AN6 (P86)
AN5 (P85)
AN4 (P84)
AN2 (P82)
AN1 (P81)
AN0 (P80)
VREFH
VREFL
converter (AD converter) with 8-channel analog input.
AN7) are shared with the input-only port 8 and can thus be used as an input port.
Note: When IDLE2, IDLE1 or STOP mode is selected, so as to reduce the power, with some
The TMP91C820A incorporates a 10-bit successive approximation-type analog/digital
Figure 3.11.1 is a block diagram of the AD converter. The 8-channel analog input pins (AN0 to
<ADTRGE><ADCH2 to ADCH0><VREFON>
AD mode control register 1 ADMOD1
timings the system may enter a standby mode even though the internal comparator is still
enabled. Therefore be sure to check that AD converter operations are halted before a HALT
instruction is executed.
ADMOD1
Figure 3.11.1 Block Diagram of AD Converter
Sample and
Channel select
91C820A-204
hold
<EOCF><ADBF><ITM0><REPEAT><SCAN><ADS>
Internal data bus
End
AD mode control register 0 ADMOD0
Busy
DA converter
Comparator
Interrupt
+
−
AD converter control
Repeat
circuit
Scan
Start
ADREG04H to ADREG37H
ADREG04L to ADREG37L
INTAD
interrupt
AD conversion result
ADTRG
TMP91C820A
register
2008-02-20