TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 65

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

P0
P1
(0000H)
(0001H)
P1CR
(0004H)
P1FC
(0005H)
Note 1: Read-modify-write is prohibited for P1CR
Note 2: <P1xF> is bit x in register P1FC; <P1xC>,
Note 3: It is set to “Port” or “Data bus “ by AM pins
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
(Note3)
Function
and P1FC.
in register P1CR.
state.
P17C
P17F
P17
0/1
7
7
7
0
P16C
P16F
P16
0/1
6
6
6
0
Data from external port (Output latch register is cleared to 0.)
Figure 3.5.4 Register for Port 1
Port 1 Function Register
Port 1 Control Register
P15C
P15F
P15
0/1
5
5
5
0
91C820A-63
Port 1 Register
Port 1 function settings
Port 1 function settings
P14C
P14F
P14
0/1
4
4
4
0
R/W
W
W
P1CR<P1xC>
P13C
P13F
P13
0/1
3
3
3
0
P1FC<P1xF>
0
1
Port 1 function settings
P12C
P12F
P12
0/1
2
2
2
0
Output port
Input port
P11C
P11F
P11
0/1
0
1
1
1
0
TMP91C820A
(D15 to D8)
P10C
P10F
2008-02-20
P10
Data bus
Don’t set
0/1
0
0
0
0
1