SAM9X25 Atmel Corporation, SAM9X25 Datasheet - Page 921

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SAM9X25

Manufacturer Part Number
SAM9X25
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9X25

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
2
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
11054A–ATARM–27-Jul-11
11054A–ATARM–27-Jul-11
All interrupts are cleared by clearing the interrupt source except for the internal timer counter
overflow interrupt and the timestamp interrupt. These interrupts are cleared by reading the
CAN_SR register.
– Warn Limit interrupt: The CAN module is in Error-active Mode, but at least one of its
– Wake-up interrupt: This interrupt is generated after a wake-up and a bus
– Sleep interrupt: This interrupt is generated after a Low-power Mode enable once all
– Internal timer counter overflow interrupt: This interrupt is generated when the
– Timestamp interrupt: This interrupt is generated after the reception or the
error counter value exceeds 96.
synchronization.
pending messages in transmission have been sent.
internal timer rolls over.
transmission of a start of frame or an end of frame. The value of the internal counter
is copied in the CAN_TIMESTP register.
SAM9X25
SAM9X25
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