SAM9X25 Atmel Corporation, SAM9X25 Datasheet - Page 667

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SAM9X25

Manufacturer Part Number
SAM9X25
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9X25

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
2
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Figure 35-3. SPI Transfer Format (NCPHA = 1, 8 bits per transfer)
Figure 35-4. SPI Transfer Format (NCPHA = 0, 8 bits per transfer)
35.7.3
11054A–ATARM–27-Jul-11
11054A–ATARM–27-Jul-11
SPCK cycle (for reference)
SPCK cycle (for reference)
(from master)
(from master)
(from slave)
(CPOL = 0)
(CPOL = 1)
(from slave)
(CPOL = 0)
(CPOL = 1)
(to slave)
(to slave)
Master Mode Operations
SPCK
SPCK
MOSI
MISO
SPCK
SPCK
MOSI
MISO
NSS
NSS
* Not defined, but normally MSB of previous character received.
*
When configured in Master Mode, the SPI operates on the clock generated by the internal pro-
grammable baud rate generator. It fully controls the data transfers to and from the slave(s)
* Not defined but normally LSB of previous character transmitted.
MSB
1
1
MSB
MSB
MSB
2
2
6
6
6
6
3
3
5
5
5
5
4
4
4
4
4
4
5
5
3
3
3
3
6
6
6
2
2
2
2
7
7
1
1
1
1
8
8
LSB
LSB
LSB
SAM9X25
SAM9X25
LSB
*
667
667

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