SAM9X25 Atmel Corporation, SAM9X25 Datasheet - Page 478

no-image

SAM9X25

Manufacturer Part Number
SAM9X25
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9X25

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
2
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Figure 31-5. Multi Buffer Transfer Using Linked List
478
478
DSCRx(0)
SAM9X25
SAM9X25
DSCRx(1)
CTRLBx
CTRLAx
DADDRx
SADDRx
The Linked List multi-buffer transfer is initiated by programming DMAC_DSCRx with DSCRx(0)
(LLI(0) base address) different from zero. Other fields and registers are ignored and overwritten
when the descriptor is retrieved from memory.
The last transfer descriptor must be written to memory with its next descriptor address set to 0.
= DSCRx(0) + 0xC
= DSCRx(0) + 0x8
= DSCRx(0) + 0x4
LLI(0)
= DSCRx(0) + 0x0
= DSCRx(0) + 0x10
System Memory
DSCRx(1)
DSCRx(2)
CTRLBx
CTRLBx
DADDRx
SADDRx
LLI(1)
= DSCRx(1) + 0xC
= DSCRx(1) + 0x8
= DSCRx(1) + 0x4
= DSCRx(1) + 0x0
= DSCRx(1) + 0x10
DSCRx(2)
(points to 0 if
LLI(1) is the last
transfer descriptor
11054A–ATARM–27-Jul-11
11054A–ATARM–27-Jul-11

Related parts for SAM9X25