SAM9X25 Atmel Corporation, SAM9X25 Datasheet - Page 381

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SAM9X25

Manufacturer Part Number
SAM9X25
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9X25

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
2
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
29.8.2.3
11054A–ATARM–27-Jul-11
11054A–ATARM–27-Jul-11
Signal Multiplexing
Figure 29-6.
Depending on the BAT, only the write signals or the byte select signals are used. To save IOs at
the external bus interface, control signals at the SMC interface are multiplexed.
shows signal multiplexing depending on the data bus width and the byte access type.
For 32-bit devices, bits A0 and A1 are unused. For 16-bit devices, bit A0 of address is unused.
When Byte Select Option is selected, NWR1 to NWR3 are unused. When Byte Write option is
selected, NBS0 to NBS3 are unused.
Connection of 2 x 8-bit Devices on a 16-bit Bus: Byte Write Option
SMC
D[15:8]
NCS[3]
A[24:2]
D[7:0]
NWR0
NWR1
NRD
A1
A[23:1]
A[0]
Write Enable
Read Enable
Memory Enable
D[15:8]
A[23:1]
A[0]
Write Enable
Read Enable
Memory Enable
D[7:0]
SAM9X25
SAM9X25
Table 29-3
381
381

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