SAM9X25 Atmel Corporation, SAM9X25 Datasheet - Page 539

• Manufacturer Part Number: SAM9X25
• Manufacturer: Atmel Corporation

Specifications of SAM9X25

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 2
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

11054A–ATARM–27-Jul-11
11054A–ATARM–27-Jul-11
All endpoints (except endpoint 0) can be configured either as Bulk, Interrupt or Isochronous. See
Table 33-1. UDPHS Endpoint
The maximum packet size they can accept corresponds to the maximum endpoint size.
Note: The endpoint size of 1024 is reserved for isochronous endpoints.
The size of the DPRAM is
required by the active endpoints must not exceed the size of the DPRAM.
SIZE_DPRAM = SIZE _EPT0
If a user tries to configure endpoints with a size the sum of which is greater than the DPRAM,
then the EPT_MAPD is not set.
The application has access to the physical block of DPR reserved for the endpoint through a
KB logical address space.
The physical block of DPR allocated for the endpoint is remapped all along the
address space. The application can write a
Figure 33-5. Logical Address Space for DPR Access
+ NB_BANK_EPT1 x SIZE_EPT1
+ NB_BANK_EPT2 x SIZE_EPT2
+ NB_BANK_EPT3 x SIZE_EPT3
+ NB_BANK_EPT4 x SIZE_EPT4
+ NB_BANK_EPT5 x SIZE_EPT5
+ NB_BANK_EPT6 x SIZE_EPT6
+... (refer to
33.7.11 UDPHS Endpoint Configuration
64 KB
EP0
64 KB
EP1
64 KB
EP2
64 KB
EP3
Logical address
...
8 to1024 B
8 to1024 B
8 to1024 B
8 to 64 B
4
...
KB. The DPR is shared by all active endpoints. The memory size
Description.
64
KB buffer linearly.
Register)
DPR
8 to1024 B
8 to1024 B
8 to 64 B
8 to1024 B
8 to1024 B
1 bank
x banks
y banks
z banks
SAM9X25
SAM9X25
64
KB logical
539
539
64