SAM9X25 Atmel Corporation, SAM9X25 Datasheet - Page 1081

• Manufacturer Part Number: SAM9X25
• Manufacturer: Atmel Corporation

Specifications of SAM9X25

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 2
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

45.6.26
These registers reset to zero on a read and stick at all ones when they count to their maximum value. They should be read
frequently enough to prevent loss of data. The receive statistics registers are only incremented when the receive enable bit
is set in the network control register. To write to these registers, bit 7 must be set in the network control register. The statis-
tics register block contains the following registers.
45.6.26.1
Name:
Address:
Access:
• FROK: Pause Frames received OK
A 16-bit register counting the number of good pause frames received. A good frame has a length of 64 to 1518 (1536 if bit
8 set in network configuration register) and has no FCS, alignment or receive symbol errors.
45.6.26.2
Name:
Address:
Access:
• FTOK: Frames Transmitted OK
A 24-bit register counting the number of frames successfully transmitted, i.e., no underrun and not too many retries.
11054A–ATARM–27-Jul-11
11054A–ATARM–27-Jul-11
31
23
15
31
23
15
–
–
7
–
7
EMAC Statistic Registers
Pause Frames Received Register
Frames Transmitted OK Register
EMAC_PFR
0xF802C03C
Read-write
EMAC_FTO
0xF802C040
Read-write
30
22
14
30
22
14
–
–
6
–
6
29
21
13
29
21
13
–
–
5
–
5
28
20
12
28
20
12
–
–
4
–
4
FROK
FROK
FTOK
FTOK
FTOK
27
19
11
27
19
11
–
–
3
–
3
26
18
10
26
18
10
–
–
2
–
2
25
17
25
17
–
–
9
1
–
9
1
SAM9X25
SAM9X25
24
16
24
16
–
–
8
0
–
8
0
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