SAM9X25 Atmel Corporation, SAM9X25 Datasheet - Page 179
SAM9X25
Manufacturer Part Number
SAM9X25
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9X25.pdf
(45 pages)
3.SAM9X25.pdf
(1145 pages)
4.SAM9X25.pdf
(45 pages)
5.SAM9X25.pdf
(1325 pages)
Specifications of SAM9X25
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
2
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9X25 PDF datasheet #2
- SAM9X25 PDF datasheet #3
- SAM9X25 PDF datasheet #4
- SAM9X25 PDF datasheet #5
- Current page: 179 of 1145
- Download datasheet (26Mb)
11054A–ATARM–27-Jul-11
11054A–ATARM–27-Jul-11
Figure 21-7. UTMI PLL Block Diagram
Whenever the UTMI PLL is enabled by writing UPLLEN in CKGR_UCKR, the LOCKU bit in
PMC_SR is automatically cleared. The values written in the PLLCOUNT field in CKGR_UCKR
are loaded in the UTMI PLL counter. The UTMI PLL counter then decrements at the speed of
the Slow Clock divided by 8 until it reaches 0. At this time, the LOCKU bit is set in PMC_SR and
can trigger an interrupt to the processor. The user has to load the number of Slow Clock cycles
required to cover the UTMI PLL transient time into the PLLCOUNT field.
MAINCK
SLCK
UPLLCOUNT
UTMI PLL
UTMI PLL
UPLLEN
Counter
LOCKU
UPLLCK
SAM9X25
SAM9X25
179
179
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