SAM9X25 Atmel Corporation, SAM9X25 Datasheet - Page 1102

• Manufacturer Part Number: SAM9X25
• Manufacturer: Atmel Corporation

Specifications of SAM9X25

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 2
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

46.12 Analog-to-Digital Converter (ADC)
Table 46-22. Channel Conversion Time and ADC Clock
Note:
Table 46-23. External Voltage Reference Input
Table 46-24. Analog Inputs
1102
1102
Parameter
ADC Clock Frequency
Startup Time
Track and Hold Acquisition Time (TTH)
Conversion Time (TCT)
Throughput Rate
Parameter
ADVREF Input Voltage Range
ADVREF Average Current
Current Consumption on VDDANA
Parameter
Input Voltage Range
Input Leakage Current
Input Capacitance
Input Impedance
1. The Track-and-Hold Acquisition Time is given by:
SAM9X25
SAM9X25
The ADC internal clock is divided by 2 in order to generate a clock with a duty cycle of 75%. So the maximum conversion
time is given by:
The full speed is obtained for an input source impedance of < 50
In order to make the TSADC work properly, the SHTIM field in TSADCC Mode Register is to be calculated according to this
Track and Hold Acquisition Time, also called Sampled and Hold Time.
TTH (ns)
TCT μs
=
=
500
---------- - MHz
Fclk
23
+
0.12
Z
Conditions
Conditions
10-bit resolution mode
Return from Idle Mode
ADC Clock = 13.2 MHz
ADC Clock = 13.2 MHz
ADC Clock = 5 MHz
ADC Clock = 13.2 MHz
ADC Clock = 5 MHz
IN
(1)
(1)
(1)
(1)
(1)
maximum, or TTH = 500 ns.
Min
2.4
Min
0
Min
0.5
Typ
Typ
50
7
Typ
VDDANA
ADVREF
11054A–ATARM–27-Jul-11
11054A–ATARM–27-Jul-11
Max
600
600
Max
2.5
Max
13.2
1.74
10
440
192
4.6
40
Units
Units
Units
kSPS
MHz
mA
μA
μA
pF
μs
μs
μs
V
V