SAM9X25 Atmel Corporation, SAM9X25 Datasheet - Page 314

• Manufacturer Part Number: SAM9X25
• Manufacturer: Atmel Corporation

Specifications of SAM9X25

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 2
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

26.5
26.5.1
Table 26-3.
Notes:
314
314
Signals:
EBI_
Controller
D0 - D7
D8 - D15
D16 - D23
D24 - D31
A0/NBS0
A1/NWR2/NBS2/DQM2
A2 - A22
A23 - A25
NCS0
NCS1/DDRSDCS
NCS2
NCS3/NANDCS
NCS4
NCS5
NRD
NWR0/NWE
NWR1/NBS1
NWR3/NBS3/DQM3
(5)
(5)
(5)
Application Example
1. NWR1 enables upper byte writes. NWR0 enables lower byte writes.
2. NWRx enables corresponding byte x writes. (x = 0,1,2 or 3)
3. NBS0 and NBS1 enable respectively lower and upper bytes of the lower 16-bit word.
4. NBS2 and NBS3 enable respectively lower and upper bytes of the upper 16-bit word.
5. D24-31 and A20, A23-A25, NCS2, NCS4, NCS5 are multiplexed on PD15-PD31.
(5)
(5)
(5))
SAM9X25
SAM9X25
Hardware Interface
EBI Pins and External Static Device Connections
8-bit Static
Table 26-3 on page 314
external devices for each Memory Controller.
A[23:25]
Device
D0 - D7
A[2:22]
WE
CS
CS
CS
CS
CS
CS
OE
A0
A1
–
–
–
–
–
2 x 8-bit
D8 - D15
Devices
A[22:24]
D0 - D7
A[1:21]
Static
WE
WE
OE
CS
CS
CS
CS
CS
CS
A0
–
–
–
–
(1)
(1)
details the connections to be applied between the EBI pins and the
16-bit Static
Pins of the Interfaced Device
D8 - D15
A[22:24]
Device
D0 - D7
A[1:21]
NUB
NLB
WE
OE
CS
CS
CS
CS
CS
CS
A0
–
–
–
SMC
D16 - D23
D24 - D31
4 x 8-bit
Devices
D8 - D15
A[21:23]
D0 - D7
A[0:20]
Static
WE
WE
WE
WE
CS
CS
CS
CS
CS
CS
OE
–
(2)
(2)
(2)
(2)
2 x 16-bit
D16 - D23
D24 - D31
Devices
A[21:23]
D0 - D7
D8 - 15
A[0:20]
NUB
NUB
Static
NLB
NLB
WE
CS
CS
CS
CS
CS
CS
OE
(3)
(4)
(3)
(4)
11054A–ATARM–27-Jul-11
11054A–ATARM–27-Jul-11
32-bit Static
D16 - D23
D24 - D31
A[21:23]
Device
D0 - D7
D8 - 15
A[0:20]
BE0
BE2
BE1
BE3
WE
CS
CS
CS
CS
CS
CS
OE