MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 498

• Manufacturer Part Number: MC68HC916Y3CFT16
• Description: IC MCU 96K FLASH 16MHZ 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC916Y3CFT16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

MOTOROLA
I-16
address map D-86
block diagram 14-1
components 14-2
FREEZE flag (TPUF) D-91
function library 14-5
G mask functions 14-11
host interface 14-3
interrupts 14-5
microengine 14-3
operation 14-4
overview 14-1
parameter RAM 14-3, D-96
registers
output compare (OC) 14-7
period
position-synch pulse generator (PSP) 14-9
pulse width modulation (PWM) 14-8
quadrature decode (QDEC) 14-10
stepper motor (SM) 14-9
synch pw modulation (SPWM) 14-8
brushless motor commutation (COMM) 14-13
fast quadrature decode (FQD) 14-12
frequency measurement (FQM) 14-13
hall effect decode (HALLD) 14-13
multichannel pulse width modulation (PCPWM)
new input capture/transition counter (NITC)
programmable time accumulator (PTA) 14-12
queued output match (QOM) 14-11
table stepper motor (TSM) 14-11
universal
coherency 14-5
emulation support 14-5
event timing 14-4
interchannel communication 14-4
programmable channel service priority 14-5
address map D-97
channel
decoded channel number register (DCNR) D-94
development
host
link register (LR) D-94
module configuration register (TPUMCR) D-87
service grant latch register (SGLR) D-94
test configuration register (TCR) D-89
/pw accumulator (PPWA) 14-10
measurement
function select registers (CFSR) D-92
interrupt
priority registers (CPR) D-93
support control register (DSCR) D-89
support status register (DSSR) D-90
sequence registers (HSQR) D-92
service request registers (HSSR) D-93
add transition detect (PMA) 14-8
missing transition detect (PMM) 14-8
14-12
14-11
(UART) 14-13
enable register (CIER) 14-5, D-91
status register (CISR) 14-5, D-94
asynchronous
receiver/transmitter
TPU Reference Manual 14-3, 14-18
TPU2
TPUF D-91
TPUMCR 14-14, D-87
TPUMCR2 14-14, D-94
TR D-59
Transfer length options 11-18
Transistion-sensitivity 5-56
Transmission
Transmit
Transmitter enable (TE) 12-4, 12-14, 12-20
TSM 14-11
TST D-9
TSTMSRA D-23
TSTMSRB D-23
TSTRC D-24
TSTSC D-24
Two/three wire transfers 12-4
Two’s complement 4-6
TXD (QSM) 11-26
TXDA/B 12-17, 12-18
UART 12-2, 12-13, 14-13
Universal asynchronous receiver/transmitter (UART)
Using the TPU Function Library and TPU Emulation
scheduler 14-3
time
timer channels 14-2
enable bit D-88
module configuration register 2 (TPUMCR2) D-94
complete
complete
data
data (TXDA/B) pins 12-18
enable (TE)
interrupt enable (TIE) 12-21
RAM 11-8
TPU interrupt configuration register (TICR) D-91
bases 14-2
(TC) flag 12-20
interrupt enable (TCIE) 12-21
(TC) flag
interrupt enable (TCIE)
(TXD) pin — QSM 11-26
register empty (TDRE) flag 12-20
MCCI D-70
QSM 11-28, D-50
MCCI D-69
QSM 11-30, D-50
12-2, 12-13, 14-13
Mode 14-5
MCCI D-70
QSM 11-29, D-51
MCCI D-69
QSM 11-30, D-50
MCCI D-70
QSM 11-29, D-51
–U–
MC68HC16Y3/916Y3
USER’S MANUAL