MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 275

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MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
12.3.5 SPI Serial Clock Baud Rate
MC68HC16Y3/916Y3
USER’S MANUAL
SCK is inactive for the last half of the eighth SCK cycle. For a master, SPIF is set at
the end of the eighth SCK cycle (after the seventeenth SCK edge). Since the last SCK
edge occurs in the middle of the eighth SCK cycle, however, the slave has no way of
knowing when the end of the last SCK cycle occurs. The slave therefore considers the
transfer complete after the last bit of serial data has been sampled, which corresponds
to the middle of the eighth SCK cycle.
When CPHA is one, the SS line may remain at its active low level between transfers.
This format is sometimes preferred in systems having a single fixed master and only
one slave that needs to drive the MISO data line.
Baud rate is selected by writing a value from 2 to 255 into SPBR[7:0] in the SPCR of
the master MCU. Writing a SPBR[7:0] value into the SPCR of the slave device has no
effect. The SPI uses a modulus counter to derive SCK baud rate from the MCU system
clock.
The following expressions apply to SCK baud rate:
Giving SPBR[7:0] a value of zero or one disables the baud rate generator. SCK is
disabled and assumes its inactive state value.
SPBR[7:0] has 254 active values. Table 12-4 lists several possible baud values and
the corresponding SCK frequency based on a 16.78-MHz system clock.
System Clock
Frequency
16.78 MHz
MULTICHANNEL COMMUNICATION INTERFACE
SPBR[7:0]
Required Division
Table 12-4 SCK Frequencies
SCK Baud Rate
Ratio
168
510
16
34
4
8
=
------------------------------------------------------------------------- -
2 SCK Baud Rate Desired
Value of SPBR Actual SCK Frequency
or
=
255
17
84
2
4
8
------------------------------------ -
2 SPBR[7:0]
f
sys
f
sys
4.19 MHz
2.10 MHz
1.05 MHz
493 kHz
100 kHz
33 kHz
MOTOROLA
12-11

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