MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 171

• Manufacturer Part Number: MC68HC916Y3CFT16
• Description: IC MCU 96K FLASH 16MHZ 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC916Y3CFT16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

5.9.1 Chip-Select Registers
5.9.1.1 Chip-Select Pin Assignment Registers
MC68HC16Y3/916Y3
USER’S MANUAL
Each chip-select pin can have one or more functions. Chip-select pin assignment reg-
isters CSPAR[1:0] determine functions of the pins. Pin assignment registers also de-
termine port size (8- or 16-bit) for dynamic bus allocation. A pin data register (PORTC)
latches data for chip-select pins that are used for discrete output.
Blocks of addresses are assigned to each chip-select function. Block sizes of 2 Kbytes
to 1 Mbyte can be selected by writing values to the appropriate base address register
(CSBAR[10:0] and CSBARBT). However, because the logic state of ADDR20 is al-
ways the same as the state of ADDR19 in the MCU, the largest usable block size is
512 Kbytes. Multiple chip-selects assigned to the same block of addresses must have
the same number of wait states.
Chip-select option registers (CSORBT and CSOR[0:10]) determine timing of and con-
ditions for assertion of chip-select signals. Eight parameters, including operating
mode, access size, synchronization, and wait state insertion can be specified.
Initialization software usually resides in a peripheral memory device controlled by the
chip-select circuits. A set of special chip-select functions and registers (CSORBT and
CSBARBT) is provided to support bootstrap operation.
Comprehensive address maps and register diagrams are provided in APPENDIX D
REGISTER SUMMARY.
The pin assignment registers contain twelve 2-bit fields that determine the functions of
the chip-select pins. Each pin has two or three possible functions, as shown in Table
5-22.
Table 5-23 shows pin assignment field encoding. Pins that have no discrete output
function must not use the %00 encoding as this will cause the alternate function to be
selected. For instance, %00 for CS0/BR will cause the pin to perform the BR function.
Chip-Select
CSBOOT
CS10
Table 5-22 Chip-Select Pin Functions
CS0
CS1
CS2
CS3
CS4
CS5
CS6
CS7
CS8
CS9
Alternate
Function
CSBOOT
ADDR19
ADDR20
ADDR21
ADDR22
ADDR23
BGACK
FC0
FC1
FC2
BR
BG
Discrete
Output
ECLK
PC0
PC1
PC2
PC3
PC4
PC5
PC6
—
—
—
—
MOTOROLA
5-63