MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 429

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MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
RWU — Receiver Wakeup
SBK — Send Break
D.7.6 SCI Status Register
SCSR — SCI Status Register
Bits[15:9] — Not implemented
TDRE — Transmit Data Register Empty
TC — Transmit Complete
RDRF — Receive Data Register Full
RAF — Receiver Active
IDLE — Idle-Line Detected
MC68HC16Y3/916Y3
USER’S MANUAL
RESET:
15
SCSR contains flags that show SCI operating conditions. These flags are cleared
either by SCI hardware or by a read/write sequence. The sequence consists of reading
SCSR, then reading or writing SCDR.
If an internal SCI signal for setting a status bit comes after reading the asserted status
bits, but before writing or reading SCDR, the newly set status bit is not cleared. SCSR
must be read again with the bit set and SCDR must be read or written before the status
bit is cleared.
A long-word read can consecutively access both SCSR and SCDR. This action clears
receive status flag bits that were set at the time of the read, but does not clear TDRE
or TC flags. Reading either byte of SCSR causes all 16 bits to be accessed, and any
status bit already set in either byte is cleared on a subsequent read or write of SCDR.
0 = Normal receiver operation (received data recognized).
1 = Wakeup mode enabled (received data ignored until receiver is awakened).
0 = Normal operation
1 = Break frame(s) transmitted after completion of the current frame.
0 = Transmit data register still contains data to be sent to the transmit serial shifter.
1 = A new character can now be written to the transmit data register.
0 = SCI transmitter is busy.
1 = SCI transmitter is idle.
0 = Receive data register is empty or contains previously read data.
1 = Receive data register contains new data.
0 = SCI receiver is idle.
1 = SCI receiver is busy.
0 = SCI receiver did not detect an idle-line condition.
1 = SCI receiver detected an idle-line condition.
NOT USED
9
TDRE
8
1
TC
7
1
RDRF
6
0
RAF
5
0
IDLE
4
0
OR
3
0
NF
2
0
$YFFC0C
MOTOROLA
FE
1
0
D-51
PF
0
0

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