MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 398

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MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
D.2.24 Chip-Select Base Address Register Boot
CSBARBT — Chip-Select Base Address Register Boot
D.2.25 Chip-Select Base Address Registers
CSBAR[0:10] — Chip-Select Base Address Registers
ADDR[23:11] — Base Address
BLKSZ[2:0] — Block Size Field
D-20
MOTOROLA
ADDR
ADDR
15
23
15
23
0
0
RESET:
RESET:
Each chip-select pin has an associated base address register. A base address is the
lowest address in the block of addresses enabled by a chip select. CSBARBT contains
the base address for selection of a boot memory device. Bit and field definitions for
CSBARBT and CSBAR[0:10] are the same, but reset block sizes differ. These
registers may be read or written at any time.
This field sets the starting address of a particular chip-select’s address space. The
address compare logic uses only the most significant bits to match an address within
a block. The value of the base address must be an integer multiple of the block size.
Base address register diagrams show how base register bits correspond to address
lines.
This field determines the size of the block that is enabled by the chip-select.
Table D-12 shows bit encoding for the base address registers block size field.
ADDR
ADDR
14
22
14
22
0
0
ADDR
ADDR
13
21
13
21
0
0
ADDR
ADDR
12
20
12
20
0
0
NOTES:
Table D-12 Block Size Field Bit Encoding
BLKSZ[2:0]
ADDR
ADDR
1. ADDR[23:20] are the same logic level as ADDR19 during
11
19
11
19
0
0
normal operation.
000
001
010
011
100
101
110
111
ADDR
ADDR
10
18
10
18
0
0
ADDR
ADDR
REGISTER SUMMARY
17
17
Block Size
128 Kbytes
256 Kbytes
512 Kbytes
512 Kbytes
9
0
9
0
16 Kbytes
64 Kbytes
2 Kbytes
8 Kbytes
ADDR
ADDR
16
16
8
0
8
0
ADDR
ADDR
15
15
Address Lines Compared
7
0
7
0
ADDR
ADDR
14
14
ADDR[23:11]
ADDR[23:13]
ADDR[23:14]
ADDR[23:16]
ADDR[23:17]
ADDR[23:18]
ADDR[23:19]
ADDR[23:20]
6
0
6
0
ADDR
ADDR
13
13
5
0
5
0
ADDR
ADDR
12
12
4
0
4
0
$YFFA4C–$YFFA74
1
ADDR
ADDR
11
11
3
0
3
0
MC68HC16Y3/916Y3
USER’S MANUAL
2
1
2
0
BLKSZ[2:0]
BLKSZ[2:0]
$YFFA48
1
1
1
0
0
1
0
0

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