MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 385

• Manufacturer Part Number: MC68HC916Y3CFT16
• Description: IC MCU 96K FLASH 16MHZ 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC916Y3CFT16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

SYNCR — Clock Synthesizer Control Register
ABD — Address Bus Disable
RWD — Read/Write Disable
IARB[3:0] — Interrupt Arbitration ID
D.2.2 SCIM Test Register
SCIMTR — Single-Chip Integration Module Test Register
D.2.3 Clock Synthesizer Control Register
MC68HC16Y3/916Y3
USER’S MANUAL
NOTES:
15
W
0
RESET:
1. Ensure that initialization software does not change the value of these bits. They should always be 0.
ABD is cleared to zero when the MCU is in an expanded mode, and set to one in
single-chip mode. ABD can be written only once after reset.
RWD is cleared to zero when the MCU is in an expanded mode, and set to one in
single-chip mode. RWD can be written only once after reset.
Each module that can generate interrupts, including the SCIM2, has an IARB field.
Each IARB field can be assigned a value from $0 to $F. During an interrupt
acknowledge cycle, IARB permits arbitration among simultaneous interrupts of the
same priority level. The reset value of the SCIM2 IARB field is $F, the highest priority.
This prevents SCIM2 interrupts from being discarded during system initialization.
Used for factory test only.
This register determines system clock operating frequency and operation during low-
power stop mode. With a slow reference frequency between 25 and 50 kHz (typically
a 32.768-kHz crystal), the clock frequency is determined by the following equation:
0 = Pins ADDR[2:0] operate normally.
1 = Pins ADDR[2:0] are disabled.
0 = R/W signal operates normally
1 = R/W signal placed in high-impedance state.
14
X
0
13
1
12
1
11
1
Y[5:0]
10
1
f
9
1
sys
REGISTER SUMMARY
=
8
1
f
ref
EDIV
7
0
4 Y
+
6
0
0
1
2
5
0
0
2W
SERVED
+
X
RE
4
0
1
SLOCK
U
3
SERVED
RE
2
0
1
$YFFA04
$YFFA02
STSCIM
MOTOROLA
1
0
STEXT
D-7
0
0