MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 312

no-image

MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
14.3 TPU Operation
14.3.1 Event Timing
14.3.2 Channel Orthogonality
14.3.3 Interchannel Communication
14-4
MOTOROLA
All TPU2 functions are related to one of the two 16-bit time bases. Functions are syn-
thesized by combining sequences of match events and capture events. Because the
primitives are implemented in hardware, the TPU2 can determine precisely when a
match or capture event occurs, and respond rapidly. An event register for each
channel provides for simultaneity of match/capture event occurrences on all channels.
When a match or input capture event requiring service occurs, the affected channel
generates a service request to the scheduler. The scheduler determines the priority of
the request and assigns the channel to the microengine at the first available time. The
microengine performs the function defined by the content of the control store or emu-
lation RAM, using parameters from the parameter RAM.
Match and capture events are handled by independent channel hardware. This pro-
vides an event accuracy of one time-base clock period, regardless of the number of
channels that are active. An event normally causes a channel to request service. The
time needed to respond to and service an event is determined by which channels and
the number of channels requesting service, the relative priorities of the channels re-
questing service, and the microcode execution time of the active functions. Worst-
case event service time (latency) determines TPU2 performance in a given applica-
tion. Latency can be closely estimated. For more information, refer to the TPU
Reference Manual (TPURM/AD)
Most timer systems are limited by the fixed number of functions assigned to each pin.
All TPU2 channels contain identical hardware and are functionally equivalent in oper-
ation, so that any channel can be configured to perform any time function. Any function
can operate on the calling channel, and, under program control, on another channel
determined by the program or by a parameter. The user controls the combination of
time functions.
The autonomy of the TPU2 is enhanced by the ability of a channel to affect the oper-
ation of one or more other channels without CPU16 intervention. Interchannel commu-
nication can be accomplished by issuing a link service request to another channel, by
controlling another channel directly, or by accessing the parameter RAM of another
channel.
TIME PROCESSOR UNIT 2
MC68HC16Y3/916Y3
USER’S MANUAL

Related parts for MC68HC916Y3CFT16