MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 422

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MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
D.6.6 ADC Status Register
ADCSTAT — ADC Status Register
SCF — Sequence Complete Flag
CCTR[2:0] — Conversion Counter
CCF[7:0] — Conversion Complete Flags
D.6.7 Right Justified, Unsigned Result Register
D.6.8 Left Justified, Signed Result Register
D-44
RJURR — Right-Justified, Unsigned Result Register
LJSRR — Left Justified, Signed Result Register
MOTOROLA
SCF
8/10
15
15
15
0
RESET:
ADCSTAT contains information related to the status of a conversion sequence.
SCF is set at the end of the conversion sequence when SCAN is cleared, and at the
end of the first conversion sequence when SCAN is set. SCF is cleared when ADCTL1
is written and a new conversion sequence begins.
This field reflects the contents of the conversion counter pointer in either four or eight
count conversion sequence. The value corresponds to the number of the next result
register to be written, and thus indicates which channel is being converted.
Each bit in this field corresponds to an A/D result register (for example, CCF7 to
RSLT7). A bit is set when conversion for the corresponding channel is complete, and
remains set until the associated result register is read.
Conversion result is unsigned right-justified data. Bits [9:0] are used for 10-bit resolu-
tion. For 8-bit conversions, bits [7:0] contain data and bits [9:8] are zero. Bits [15:10]
always return zero when read.
Conversion result is signed left-justified data. Bits [15:6] are used for 10-bit resolution.
For 8-bit conversions, bits [15:8] contain data and bits [7:6] are zero. Although the ADC
is unipolar, it is assumed that the zero point is halfway between low and high reference
when this format is used (V
input, bit 15 = 1. Bits [5:0] always return zero when read.
0 = Sequence not complete
1 = Sequence complete
8/10
14
14
8/10
13
NOT USED
13
NOT USED
8/10
12
12
8/10
11
11
8/10
10
10
10
0
RH
CCTR[2:0]
8/10
– V
10
9
0
9
9
RL
8/10
10
/2). For positive input, bit 15 = 0. For negative
8
0
8
8
8/10
10
7
0
7
7
8/10
10
6
6
6
0
8/10
5
5
5
0
8/10
4
4
0
CCF[7:0]
$YFF710–$YFF71F
$YFF720–$YFF72F
8/10
NOT USED
3
3
0
MC68HC16Y3/916Y3
8/10
USER’S MANUAL
2
2
0
$YFF70E
8/10
1
1
0
8/10
0
0
0
0

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