MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 314

• Manufacturer Part Number: MC68HC916Y3CFT16
• Description: IC MCU 96K FLASH 16MHZ 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC916Y3CFT16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

14.4 A Mask Set Time Functions
14.4.1 Discrete Input/Output (DIO)
14-6
MOTOROLA
The value of the channel interrupt request level (CIRL) field in the TPU2 interrupt
configuration register (TICR) determines the priority of all TPU2 interrupt service re-
quests. CIRL values correspond to MCU interrupt request signals IRQ[7:1]. IRQ7 is
the highest-priority request signal; IRQ1 has the lowest priority. Assigning a value of
%111 to CIRL causes IRQ7 to be asserted when a TPU2 interrupt request is made;
lower field values cause corresponding lower-priority interrupt request signals to be
asserted. Assigning CIRL a value of %000 disables all interrupts.
The CPU16 recognizes only interrupt requests of a priority greater than the value
contained in the interrupt priority (IP) mask in the status register. When the CPU16
acknowledges an interrupt request, the priority of the acknowledged interrupt is written
to the IP mask and is driven out onto the IMB address lines.
When the IP mask value driven out on the address lines is the same as the CIRL value,
the TPU2 contends for arbitration priority. The IARB field in TPUMCR contains the
TPU arbitration number. Each module that can make an interrupt service request must
be assigned a unique non-zero IARB value in order to implement an arbitration
scheme. Arbitration is performed by means of serial assertion of IARB field bit values.
The IARB of TPUMCR is initialized to $0 during reset.
When the TPU2 wins arbitration, it must respond to the CPU16 interrupt acknowledge
cycle by placing an interrupt vector number on the data bus. The vector number is
used to calculate displacement into the exception vector table. Vectors are formed by
concatenating the 4-bit value of the CIBV field in TICR with the 4-bit number of the
channel requesting interrupt service. Since the CIBV field has a reset value of $0, it
must be assigned a value corresponding to the upper nibble of a block of 16 user-de-
fined vector numbers before TPU2 interrupts are enabled. Otherwise, a TPU2 interrupt
service request could cause the CPU16 to take one of the reserved vectors in the
exception vector table.
For more information about the exception vector table, refer to 4.13.1 Exception Vec-
tors. Refer to 5.8 Interrupts for further information about interrupts.
The following paragraphs describe factory-programmed time functions implemented
in the A mask set TPU microcode ROM. A complete description of the functions is be-
yond the scope of this manual. Refer to the TPU Reference Manual (TPURM/AD) for
additional information.
When a pin is used as a discrete input, a parameter indicates the current input level
and the previous 15 levels of a pin. Bit 15, the most significant bit of the parameter,
indicates the most recent state. Bit 14 indicates the next most recent state, and so on.
The programmer can choose one of the three following conditions to update the pa-
rameter: 1) when a transition occurs, 2) when the CPU16 makes a request, or 3) when
a rate specified in another parameter is matched. When a pin is used as a discrete out-
put, it is set high or low only upon request by the CPU16.
TIME PROCESSOR UNIT 2
MC68HC16Y3/916Y3
USER’S MANUAL