MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 162

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MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
5.7.8 Use of the Three-State Control Pin
5.7.9 Reset Processing Summary
5-54
CLKOUT
CYCLES
MOTOROLA
NOTES:
RESET
V
LOCK
VCO
BUS
1. INTERNAL START-UP TIME
2. FIRST INSTRUCTION FETCHED
DD
Asserting the three-state control (TSC) input causes the MCU to put all output drivers
in a disabled, high-impedance state. The signal must remain asserted for approxi-
mately ten clock cycles in order for drivers to change state.
When the internal clock synthesizer is used (MODCLK held high during reset), synthe-
sizer ramp-up time affects how long the ten cycles take. Worst case is approximately
20 milliseconds from TSC assertion.
When an external clock signal is applied (MODCLK held low during reset), pins go to
high-impedance state as soon after TSC assertion as approximately ten clock pulses
have been applied to the EXTAL pin.
To prevent write cycles in progress from being corrupted, a reset is recognized at the
end of a bus cycle, and not at an instruction boundary. Any processing in progress at
the time a reset occurs is aborted. After SCIM2 reset control logic has synchronized
an internal or external reset request, the MSTRST signal is asserted.
The following events take place when MSTRST is asserted.
BUS STATE
UNKNOWN
When TSC assertion takes effect, internal signals are forced to val-
ues that can cause inadvertent mode selection. Once the output driv-
ers change state, the MCU must be powered down and restarted
before normal operation can resume.
2 CLOCKS
CONTROL SIGNALS
THREE-STATED
ADDRESS AND
Figure 5-19 Power-On Reset
512 CLOCKS
10 CLOCKS
NOTE
1
MC68HC16Y3/916Y3
2
USER’S MANUAL
16 POR TIM

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