MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 48

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MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
3.5 Signal Descriptions
3-12
MOTOROLA
Type
Aw
3. DATA[15:8]/PG[7:0] and DATA[7:0]/PH[7:0] are only synchronized during reset and when being used as discrete
4. EXTAL, XFC, and XTAL are clock connections.
5. CS4 is used only on the MC68HC16Y3.
6. PAI and PCLK can be used for discrete input, but are not part of an I/O port.
7. PWMA and PWMB can be used for discrete input, but are not part of an I/O port.
Table 3-3 summarizes pin functions of the MC68HC16Y3 and MC68HC916Y3 MCUs.
Entries in the “Active State(s)” column denote the polarity of each MCU pin in its active
state. Some MCU pins have multiple functions and thus have multiple entries in the
“Active State(s)” column. For example, the ADDR23/CS10/ECLK pin can be pro-
grammed to be either address line 23 (ADDR23), chip-select output 10 (CS10), or the
M6800 bus clock (ECLK). Its entry in the “Active State(s)” column is “—/0/—” which
indicates the following:
The “Discrete I/O Use” column indicates whether each pin can be used as a general
purpose input, output, or both. Those pins that cannot be used for general purpose I/
O will have a “—” in this column.
Bo
A
B
general purpose inputs.
• When programmed as ADDR23, the pin has no active state (“—”); it conveys in-
• When programmed as CS10, the pin is active when driven to logic 0 (“0”) by the
• When programmed as ECLK, the pin has no active state (“—”). M6800 bus de-
formation when driven by the MCU to logic 0 or logic 1.
MCU. When driven to logic 1, the chip-select function is inactive.
vices drive or prepare to latch an address when ECLK is logic 0 and drive or pre-
pare to latch data when ECLK is logic 1.
I/O
O
O
O
O
Three-state capable output signals
Type A output with weak p-channel pullup during reset
Three-state output that includes circuitry to pull up output before high impedance is established,
to ensure rapid rise time
Type B output that can be operated in an open-drain mode
Table 3-2 MC68HC16Y3/MC68HC916Y3 Driver Types
Description
MC68HC16Y3/916Y3
USER’S MANUAL

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