MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 124

no-image

MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
5.4 System Protection
5.4.1 Reset Status
5.4.2 Bus Monitor
5-16
MOTOROLA
The system protection block preserves reset status, monitors internal activity, and
provides periodic interrupt generation. Figure 5-7 is a block diagram of the
submodule.
The reset status register (RSR) latches internal MCU status during reset. Refer to
5.7.10 Reset Status Register for more information.
The internal bus monitor checks data size acknowledge (DSACK) signal response
times during normal bus cycles. The monitor asserts the internal bus error (BERR) sig-
nal when the response time is excessively long.
DSACK response times are measured in clock cycles. Maximum allowable response
time can be selected by setting the bus monitor timing (BMT[1:0]) field in the system
protection control register (SYPCR). Table 5-4 shows the periods allowed.
CLOCK
2
9
PRESCALER
Figure 5-7 System Protection
SPURIOUS INTERRUPT MONITOR
MODULE CONFIGURATION
RESET STATUS
HALT MONITOR
BUS MONITOR
AND TEST
SOFTWARE WATCHDOG TIMER
PERIODIC INTERRUPT TIMER
MC68HC16Y3/916Y3
RESET REQUEST
BERR
RESET REQUEST
IRQ[7:1]
USER’S MANUAL
SYS PROTECT BLOCK

Related parts for MC68HC916Y3CFT16