D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 598

MCU 3V 0K 100-TQFP

D13007VX13V

Manufacturer Part Number
D13007VX13V
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13007VX13V

Core Processor
H8/300H
Core Size
16-Bit
Speed
13MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
19. Power-Down State
MSTCR Access from DMAC Disabled: To prevent malfunctions, MSTCR can only be accessed
from the CPU. It can be read by the DMAC, but it cannot be written by the DMAC.
19.7
Output of the system clock (φ) can be controlled by the PSTOP bit in MSTCRH. When the
PSTOP bit is set to 1, output of the system clock halts and the φ pin is placed in the high-
impedance state. Figure 19.3 shows the timing of the stopping and starting of system clock output.
When the PSTOP bit is cleared to 0, output of the system clock is enabled. Table 19.4 indicates
the state of the φ pin in various operating states.
Table 19.4 φ Pin State in Various Operating States
Operating State
Hardware standby
Software standby
Sleep mode
Normal operation
Rev.5.00 Sep. 12, 2007 Page 568 of 764
REJ09B0396-0500
φ pin
System Clock Output Disabling Function
MSTCRH write cycle
Figure 19.3 Starting and Stopping of System Clock Output
T1
(PSTOP = 1)
T2
T3
PSTOP = 0
High impedance
Always high
System clock output
System clock output
High impedance
MSTCRH write cycle
PSTOP = 1
High impedance
High impedance
High impedance
High impedance
T1
(PSTOP = 0)
T2
T3

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