D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 181

MCU 3V 0K 100-TQFP

D13007VX13V

Manufacturer Part Number
D13007VX13V
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13007VX13V

Core Processor
H8/300H
Core Size
16-Bit
Speed
13MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
6.5.7
In the H8/3006 and H8/3007, provision is made for the DRAM RAS precharge time by always
inserting one RAS precharge state (T
two T
set according to the DRAM connected and the operating frequency of the H8/3006 and H8/3007
chip. Figure 6.17 shows the timing when two T
When the TCP bit is set to 1, two T
Read access
Write access
p
Note: n = 2 to 5
states by setting the TPC bit to 1 in DRCRB. The optimum number of T
Precharge State Control
Figure 6.17 Timing with Two Precharge States (CSEL = 0 in DRCRB)
(UCAS /LCAS)
(UCAS /LCAS)
PB4 /PB5
PB4 /PB5
CSn (RAS)
RD(WE)
D
RD(WE)
D
A
15
23
15 to
to D
to A
AS
φ
D
0
0
0
p
states are also used for CAS-before-RAS refresh cycles.
p
) when DRAM space is accessed. This can be changed to
T
p1
p
states are inserted.
T
p2
Rev.5.00 Sep. 12, 2007 Page 151 of 764
High
High
Row
Tr
Column
T
c1
p
REJ09B0396-0500
cycles should be
6. Bus Controller
T
c2

Related parts for D13007VX13V