D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 505

MCU 3V 0K 100-TQFP

D13007VX13V

Manufacturer Part Number
D13007VX13V
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13007VX13V

Core Processor
H8/300H
Core Size
16-Bit
Speed
13MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
• Transmitting Serial Data (Synchronous Mode): Figure 13.16 shows a sample flowchart for
In transmitting serial data, the SCI operates as follows.
• The SCI monitors the TDRE flag in SSR. When the TDRE flag is cleared to 0, the SCI
and clear TDRE flag to 0 in SSR
transmitting serial data and indicates the procedure to follow.
recognizes that TDR contains new data, and loads this data from TDR into TSR.
Write transmit data in TDR
Clear TE bit to 0 in SCR
Read TDRE flag in SSR
Read TEND flag in SSR
All data transmitted?
Start transmitting
TDRE = 1
TEND = 1
Initialize
<End>
Figure 13.16 Sample Flowchart for Serial Transmitting
Yes
Yes
Yes
No
No
No
(1)
(2)
(3)
(1)
(2)
(3)
SCI initialization: the transmit data output
function of the TxD pin is selected
automatically.
SCI status check and transmit data write:
read SSR, check that the TDRE flag is 1,
then write transmit data in TDR and clear
the TDRE flag to 0.
To continue transmitting serial data: after
checking that the TDRE flag is 1, indicating
that data can be written, write data in TDR,
then clear the TDRE flag to 0. When the
DMAC is activated by a transmit-data-empty
interrupt request (TXI) to write data in TDR,
the TDRE flag is checked and cleared
automatically.
Rev.5.00 Sep. 12, 2007 Page 475 of 764
13. Serial Communication Interface
REJ09B0396-0500

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