D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 10

• Manufacturer Part Number: D13007VX13V
• Description: MCU 3V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of D13007VX13V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Rev.5.00 Sep. 12, 2007 Page viii of xxviii
REJ09B0396-0500
Item
8.7.2 Register
Configuration
Table 8.14 Port A Pin
Functions (Modes 1 to
4)
PA
PA
1
0
/TP
/TP
1
0
/TCLKB/TEND
/TCLKA/TEND
1
0
Page
276
277
Revision (See Manual for Details)
Table amended
Table amended
Pin
PA
TCLKB/
TEND
Pin
PA
TCLKA/
TEND
1
0
/TP
/TP
1
0
1
0
/
/
PA
NDER0
Pin function
8-bit timer
CKS2
CKS1
CKS0
Pin Functions and Selection Method
Bit MDF in TMDR, bits TPSC2 to TPSC0 in 16TCR2 to 16TCR0 of the 16-bit timer,
bits CKS2 to CKS0 in 8TCR3 of the 8-bit timer, bit NDER1 in NDERA, and bit
PA
PA
NDER1
Pin function
Notes: 1. TCLKB input when MDF = 1 in TMDR, or TPSC2 = 1, TPSC1 = 0, and
8-bit timer
channel 3
settings
CKS2
CKS1
CKS0
Pin Functions and Selection Method
Bit MDF in TMDR, bits TPSC2 to TPSC0 in 16TCR2 to 16TCR0 of the 16-bit timer,
bits CKS2 to CKS0 in 8TCR1 of the 8-bit timer, bit NDER0 in NDERA, and bit
PA
Notes: 1. TCLKA input when MDF = 1 in TMDR, or TPSC2 = 1, TPSC1 = 0 and
channel 1
settings
1
1
0
0
DDR select the pin function as follows.
DDR
DDR select the pin function as follows.
DDR
2. When an external request is specified as a DMAC activation source,
2. When an external request is specified as a DMAC activation source,
TPSC0 = 1 in any of 16TCR2 to 16TCR0, or bits CKS2 to CKS0 in
8TCR3 are as shown in (1) in the table below.
TEND
TPSC0 = 0 in any of 16TCR2 to 16TCR0, or bits CKS2 to CKS0 in
8TCR0 are as shown in (1) in the table below.
TEND
1
0
output regardless of bits PA
output regardless of bits PA
⎯
⎯
⎯
⎯
0
0
PA
PA
1
0
⎯
⎯
0
0
input
input
(2)
(2)
0
0
TEND
TEND
0
TCLKB input*
TCLKA input*
0
PA
PA
1
0
DDR and NDER1.
DDR and NDER0.
1
0
1
0
output
output
1
1
1
0
output*
output*
0
1
1
1
1
2
2
1
(1)
(1)
TP
TP
⎯
⎯
1
1
1
0
output
output
1
1
1