D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 583

MCU 3V 0K 100-TQFP

D13007VX13V

Manufacturer Part Number
D13007VX13V
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13007VX13V

Core Processor
H8/300H
Core Size
16-Bit
Speed
13MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
18.5.1
Table 18.4 summarizes the frequency division register.
Table 18.4 Frequency Division Register
Address*
H'EE01B
Note:
18.5.2
DIVCR is an 8-bit readable/writable register that selects the division ratio of the frequency
divider.
Bit
Initial value
Read/Write
DIVCR is initialized to H'FC by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 2⎯Reserved: These bits cannot be modified and are always read as 1.
Bits 1 and 0⎯Divide (DIV1, DIV0): These bits select the frequency division ratio, as follows.
Bit 1
DIV1
0
1
* Lower 20 bits of the address in advanced mode.
Bit 0
DIV0
0
1
0
1
Register Configuration
Division Control Register (DIVCR)
Name
Division control register
7
1
Frequency Division Ratio
1/1
1/2
1/4
1/8
6
1
Reserved bits
5
1
Abbreviation
DIVCR
4
1
Rev.5.00 Sep. 12, 2007 Page 553 of 764
3
1
R/W
R/W
2
1
Divide bits 1 and 0
These bits select the
frequency division ratio
18. Clock Pulse Generator
DIV1
R/W
1
0
H'FC
REJ09B0396-0500
Initial Value
(Initial value)
DIV0
R/W
0
0

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