D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 186

• Manufacturer Part Number: D13007VX13V
• Description: MCU 3V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of D13007VX13V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

6. Bus Controller
Table 6.9
Operating Mode
Modes 1 and 2
(1-Mbyte)
Modes 3 and 4
(16-Mbyte)
Note: n = 2 to 5
RAS Down Mode and RAS Up Mode: With DRAM provided with fast page mode, as long as
accesses are to the same row address, burst operation can be continued without interruption even if
accesses are not consecutive by holding the RAS signal low.
• RAS Down Mode
Rev.5.00 Sep. 12, 2007 Page 156 of 764
REJ09B0396-0500
To select RAS down mode, set the BE and RDM bits to 1 in DRCRA. If access to DRAM
space is interrupted and another space is accessed, the RAS signal is held low during the
access to the other space, and burst access is performed if the row address of the next DRAM
space access is the same as the row address of the previous DRAM space access. Figure 6.21
shows an example of the timing in RAS down mode.
Correspondence between Settings of MXC1 and MXC0 Bits and ABWCR, and
Row Address Compared in Burst Access
MXC1
0
1
0
1
DRCRB
MXC0
0
1
0
1
0
1
0
1
ABWn
ABWCR
0
1
0
1
0
1
⎯
0
1
0
1
0
1
⎯
16 bits
16 bits
16 bits
16 bits
Bus Width
8 bits
16 bits
8 bits
8 bits
⎯
8 bits
16 bits
8 bits
8 bits
⎯
A19 to A9
A19 to A8
A19 to A10
A19 to A9
A19 to A11
A19 to A10
Illegal setting
A23 to A9
A23 to A8
A23 to A10
A23 to A9
A23 to A11
A23 to A10
Illegal setting
Compared Row Address