D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 138

MCU 3V 0K 100-TQFP

D13007VX13V

Manufacturer Part Number
D13007VX13V
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13007VX13V

Core Processor
H8/300H
Core Size
16-Bit
Speed
13MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
6. Bus Controller
• Burst ROM interface
• Idle cycle insertion
• Bus arbitration function
• Other features
6.1.2
Figure 6.1 shows a block diagram of the bus controller.
Rev.5.00 Sep. 12, 2007 Page 108 of 764
REJ09B0396-0500
⎯ Burst ROM interface can be set for area 0
⎯ Selection of two- or three-state burst access
⎯ An idle cycle can be inserted in case of an external read cycle between different areas
⎯ An idle cycle can be inserted when an external read cycle is immediately followed by an
⎯ A built-in bus arbiter grants the bus right to the CPU, DMAC, DRAM interface, or an
⎯ The refresh counter (refresh timer) can be used as an interval timer
external write cycle
external bus master
Block Diagram

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