D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 112

MCU 3V 0K 100-TQFP

D13007VX13V

Manufacturer Part Number
D13007VX13V
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13007VX13V

Core Processor
H8/300H
Core Size
16-Bit
Speed
13MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
5. Interrupt Controller
5.2
5.2.1
SYSCR is an 8-bit readable/writable register that controls software standby mode, selects the
action of the UI bit in CCR, selects the NMI edge, and enables or disables the on-chip RAM.
Only bits 3 and 2 are described here. For the other bits, see section 3.3, System Control Register
(SYSCR).
SYSCR is initialized to H'09 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit
Initial value
Read/Write
Bit 3⎯User Bit Enable (UE): Selects whether to use the UI bit in CCR as a user bit or an
interrupt mask bit.
Bit 3
UE
0
1
Rev.5.00 Sep. 12, 2007 Page 82 of 764
REJ09B0396-0500
Register Descriptions
System Control Register (SYSCR)
Description
UI bit in CCR is used as interrupt mask bit
UI bit in CCR is used as user bit
SSBY
Software standby
R/W
7
0
STS2
R/W
6
0
Standby timer
select 2 to 0
STS1
R/W
5
0
STS0
R/W
4
0
User bit enable
Selects whether to use the UI bit in
CCR as a user bit or interrupt mask bit
R/W
UE
3
1
NMI edge select
Selects the NMI input edge
NMIEG
R/W
2
0
Software standby
output port enable
SSOE
R/W
1
0
RAM enable
(Initial value)
RAME
R/W
0
1

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