D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 180

MCU 3V 0K 100-TQFP

D13007VX13V

Manufacturer Part Number
D13007VX13V
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13007VX13V

Core Processor
H8/300H
Core Size
16-Bit
Speed
13MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
6. Bus Controller
If a DRAM read/write cycle is followed by an access cycle for an external area other than DRAM
space when HWR and LWR are selected as the UCAS and LCAS output pins, an idle cycle (Ti) is
inserted unconditionally immediately after the DRAM access cycle. See section 6.9, Idle Cycle,
for details.
Rev.5.00 Sep. 12, 2007 Page 150 of 764
REJ09B0396-0500
Read access
Write access
Note: n = 2 to 5
(UCAS / LCAS)
(UCAS / LCAS)
PB4 /PB5
PB4 /PB5
Figure 6.16 Basic Access Timing (CSEL = 0 in DRCRB)
CSn (RAS)
D
D
A
RD(WE)
RD(WE)
23
15
15
φ
to A
to D
to D
AS
0
0
0
T
p
Row
Tr
High
High
T
Column
c1
T
c2

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