DF2339VFC25V Renesas Electronics America, DF2339VFC25V Datasheet - Page 703
![IC H8S/2300 MCU FLASH 144QFP](/photos/12/22/122258/df2339vfc25v_sml.jpg)
DF2339VFC25V
Manufacturer Part Number
DF2339VFC25V
Description
IC H8S/2300 MCU FLASH 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2338VFC25V.pdf
(1246 pages)
Specifications of DF2339VFC25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2339VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 703 of 1246
- Download datasheet (7Mb)
15.2.2
Note: * Only 0 can be written to bits 7 to 3, to clear these flags.
Bit 4 of SSR has a different function in smart card interface mode. Coupled with this, the setting
conditions for bit 2, TEND, are also different.
Bits 7 to 5—Operate in the same way as for the normal SCI. For details, see section 14.2.7, Serial
Status Register (SSR).
Bit 4—Error Signal Status (ERS): In smart card interface mode, bit 4 indicates the status of the
error signal sent back from the receiving end in transmission. Framing errors are not detected in
smart card interface mode.
Bit 4
ERS
0
1
Note: Clearing the TE bit in SCR to 0 does not affect the ERS flag, which retains its previous
Bit
Initial value :
R/W
state.
Serial Status Register (SSR)
Description
[Clearing conditions]
•
•
side
[Setting condition]
When the low level of the error signal is sampled
Indicates data received normally with no error signal
Indicates an error signal was sent showing detection of a parity error at the receiving
:
:
Upon reset, and in standby mode or module stop mode
When 0 is written to ERS after reading ERS = 1
R/(W) *
TDRE
7
1
R/(W) *
RDRF
6
0
R/(W) *
ORER
5
0
R/(W) *
ERS
0
4
Rev.4.00 Sep. 07, 2007 Page 671 of 1210
R/(W) *
PER
3
0
TEND
R
2
1
REJ09B0245-0400
MPB
R
1
0
(Initial value)
MPBT
R/W
0
0
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