DF2339VFC25V Renesas Electronics America, DF2339VFC25V Datasheet - Page 577
![IC H8S/2300 MCU FLASH 144QFP](/photos/12/22/122258/df2339vfc25v_sml.jpg)
DF2339VFC25V
Manufacturer Part Number
DF2339VFC25V
Description
IC H8S/2300 MCU FLASH 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2338VFC25V.pdf
(1246 pages)
Specifications of DF2339VFC25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2339VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 577 of 1246
- Download datasheet (7Mb)
11.3.3
Sample Setup Procedure for Normal Pulse Output: Figure 11.4 shows a sample procedure for
setting up normal pulse output.
TPU setup
Port and
PPG setup
TPU setup
Normal Pulse Output
Figure 11.4 Setup Procedure for Normal Pulse Output (Example)
Set counting operation
Select interrupt request
Set initial output data
Select TGR functions
Select output trigger
Enable pulse output
Normal PPG output
Compare match?
Set TGRA value
Set next pulse
Set next pulse
output data
output data
Start count
Yes
No
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[1] Set TIOR to make TGRA an output
[2] Set the PPG output trigger period.
[3] Select the counter clock source
[4] Enable the TGIA interrupt in TIER.
[5] Set the initial output values in
[6] Set the DDR and NDER bits for the
[7] Select the TPU compare match
[8] Set the next pulse output values in
[9] Set the CST bit in TSTR to 1 to
[10] At each TGIA interrupt, set the next
Rev.4.00 Sep. 07, 2007 Page 545 of 1210
compare register (with output
disabled).
with bits TPSC2 to TPSC0 in TCR.
Select the counter clear source
with bits CCLR1 and CCLR0.
The DTC or DMAC can also be
set up to transfer data to NDR.
PODR.
pins to be used for pulse output to 1.
event to be used as the output
trigger in PCR.
NDR.
start the TCNT counter.
output values in NDR.
REJ09B0245-0400
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