DF2339VFC25V Renesas Electronics America, DF2339VFC25V Datasheet - Page 215
![IC H8S/2300 MCU FLASH 144QFP](/photos/12/22/122258/df2339vfc25v_sml.jpg)
DF2339VFC25V
Manufacturer Part Number
DF2339VFC25V
Description
IC H8S/2300 MCU FLASH 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2338VFC25V.pdf
(1246 pages)
Specifications of DF2339VFC25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2339VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 215 of 1246
- Download datasheet (7Mb)
6.6
When burst mode is selected with the DRAM interface, the DACK output timing can be selected
with the DDS bit. When DRAM space is accessed in DMAC single address mode at the same
time, the DDS bit selects whether or not burst access is to be performed.
6.6.1
Burst access is performed by determining the address only, irrespective of the bus master. With
the DRAM interface, the DACK output goes low from the T
Figure 6.28 shows the DACK output timing for the DRAM interface when DDS = 1.
Note: n = 2 to 5
Read
Write
Figure 6.28 DACK Output Timing when DDS = 1 (Example of DRAM Access)
DMAC Single Address Mode and DRAM Interface
When DDS = 1
A
CS
CAS (UCAS)
LCAS (LCAS)
HWR (WE)
D
HWR (WE)
D
DACK
φ
23
15
15
n
to A
to D
to D
(RAS)
0
0
0
T
p
Row
T
r
Rev.4.00 Sep. 07, 2007 Page 183 of 1210
c1
state.
T
c1
Column
T
c2
REJ09B0245-0400
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