DF2339VFC25V Renesas Electronics America, DF2339VFC25V Datasheet - Page 446
![IC H8S/2300 MCU FLASH 144QFP](/photos/12/22/122258/df2339vfc25v_sml.jpg)
DF2339VFC25V
Manufacturer Part Number
DF2339VFC25V
Description
IC H8S/2300 MCU FLASH 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2338VFC25V.pdf
(1246 pages)
Specifications of DF2339VFC25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2339VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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9.14.2
Table 9.26 shows the port D register configuration.
Table 9.26 Port D Registers
Name
Port D data direction register
Port D data register
Port D register
Port D MOS pull-up control register
Note: * Lower 16 bits of the address.
Port D Data Direction Register (PDDDR)
PDDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port D. PDDDR cannot be read; if it is, an undefined value will be read.
PDDDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
• Modes 4 to 6
• Mode 7
Rev.4.00 Sep. 07, 2007 Page 414 of 1210
REJ09B0245-0400
Bit
Initial value :
R/W
The input/output direction specification by PDDDR is ignored, and port D is automatically
designated for data I/O.
Setting a PDDDR bit to 1 makes the corresponding port D pin an output port, while clearing
the bit to 0 makes the pin an input port.
Register Configuration
:
:
PD7DDR PD6DDR PD5DDR PD4DDR PD3DDR PD2DDR PD1DDR PD0DDR
W
7
0
W
6
0
Abbreviation
PDDDR
PDDR
PORTD
PDPCR
W
5
0
W
4
0
R/W
R/W
W
R/W
R
W
0
3
Initial Value
H'00
H'00
Undefined
H'00
W
2
0
W
1
0
H'FF73
Address *
H'FEBC
H'FF6C
H'FF5C
W
0
0
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