DF2339VFC25V Renesas Electronics America, DF2339VFC25V Datasheet - Page 24
![IC H8S/2300 MCU FLASH 144QFP](/photos/12/22/122258/df2339vfc25v_sml.jpg)
DF2339VFC25V
Manufacturer Part Number
DF2339VFC25V
Description
IC H8S/2300 MCU FLASH 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2338VFC25V.pdf
(1246 pages)
Specifications of DF2339VFC25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2339VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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13.3 Operation........................................................................................................................... 587
13.4 Interrupts ........................................................................................................................... 592
13.5 Usage Notes ...................................................................................................................... 592
Section 14 Serial Communication Interface (SCI)
14.1 Overview........................................................................................................................... 595
14.2 Register Descriptions ........................................................................................................ 600
14.3 Operation........................................................................................................................... 624
14.4 SCI Interrupts.................................................................................................................... 654
14.5 Usage Notes ...................................................................................................................... 656
Rev.4.00 Sep. 07, 2007 Page xxii of xxx
13.2.3 Reset Control/Status Register (RSTCSR)............................................................ 585
13.2.4 Notes on Register Access..................................................................................... 586
13.3.1 Operation in Watchdog Timer Mode ................................................................... 587
13.3.2 Operation in Interval Timer Mode ....................................................................... 589
13.3.3 Timing of Overflow Flag (OVF) Setting ............................................................. 590
13.3.4 Timing of Watchdog Timer Overflow Flag (WOVF) Setting.............................. 591
13.5.1 Contention between Timer Counter (TCNT) Write and Increment ..................... 592
13.5.2 Changing Value of CKS2 to CKS0...................................................................... 593
13.5.3 Switching between Watchdog Timer Mode and Interval Timer Mode................ 593
13.5.4 System Reset by WDTOVF Signal...................................................................... 593
13.5.5 Internal Reset in Watchdog Timer Mode............................................................. 594
14.1.1 Features................................................................................................................ 595
14.1.2 Block Diagram..................................................................................................... 597
14.1.3 Pin Configuration................................................................................................. 598
14.1.4 Register Configuration......................................................................................... 599
14.2.1 Receive Shift Register (RSR) .............................................................................. 600
14.2.2 Receive Data Register (RDR) .............................................................................. 600
14.2.3 Transmit Shift Register (TSR) ............................................................................. 601
14.2.4 Transmit Data Register (TDR)............................................................................. 601
14.2.5 Serial Mode Register (SMR)................................................................................ 602
14.2.6 Serial Control Register (SCR).............................................................................. 605
14.2.7 Serial Status Register (SSR) ................................................................................ 609
14.2.8 Bit Rate Register (BRR) ...................................................................................... 613
14.2.9 Smart Card Mode Register (SCMR) .................................................................... 621
14.2.10 Module Stop Control Register (MSTPCR) .......................................................... 623
14.3.1 Overview.............................................................................................................. 624
14.3.2 Operation in Asynchronous Mode ....................................................................... 626
14.3.3 Multiprocessor Communication Function............................................................ 637
14.3.4 Operation in Synchronous Mode ......................................................................... 645
.................................................... 595
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