DF2339VFC25V Renesas Electronics America, DF2339VFC25V Datasheet - Page 106
![IC H8S/2300 MCU FLASH 144QFP](/photos/12/22/122258/df2339vfc25v_sml.jpg)
DF2339VFC25V
Manufacturer Part Number
DF2339VFC25V
Description
IC H8S/2300 MCU FLASH 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2338VFC25V.pdf
(1246 pages)
Specifications of DF2339VFC25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2339VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 106 of 1246
- Download datasheet (7Mb)
Bit 1
IRQPAS
0
1
Bit 0—RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is
initialized when the reset state is released. It is not initialized in software standby mode.
Bit 0
RAME
0
1
3.2.3
Note: * R/W in the H8S/2339 F-ZTAT.
SYSCR2 is an 8-bit readable/writable register that performs on-chip flash memory control.
SYSCR2 is initialized to H'00 by a reset, and in hardware standby mode.
Bits 7 to 4—Reserved: These bits are always read as 0, and cannot be modified.
Bit 3—Flash Memory Control Register Enable (FLSHE): Controls CPU access to the flash
memory control registers (FLMCR1, FLMCR2, EBR1, and EBR2). For details, see section 19,
ROM.
Bit 3
FLSHE
0
1
Bits 2 and 1—Reserved: These bits are always read as 0, and cannot be modified.
Rev.4.00 Sep. 07, 2007 Page 74 of 1210
REJ09B0245-0400
Bit
Initial value :
R/W
System Control Register 2 (SYSCR2) (F-ZTAT Version Only)
Description
P9
P5
Description
On-chip RAM is disabled
On-chip RAM is enabled
Description
Flash control registers are not selected for addresses H'FFFFC8 to H'FFFFCB
Flash control registers are selected for addresses H'FFFFC8 to H'FFFFCB
:
:
4
3
to P9
to P5
—
—
7
0
7
0
are used for IRQ
are used for IRQ
—
—
6
0
4
4
—
—
to IRQ
to IRQ
5
0
7
7
input
input
—
—
4
0
FLSHE
R/W
0
3
—
—
2
0
—
—
1
0
(Initial value)
(Initial value)
(Initial value)
— (R/W)*
—
0
0
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