HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 817

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HD6432160

Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Item
Section 19 Host Interface
LPC Interface (LPC)
19.3 Register Descriptions 506
19.3.4 Input Data
Registers (IDR1 to IDR3)
19.3.5 Output Data
Registers (ODR1 to
ODR3)
19.3.6 Bidirectional Data
Registers (TWR0 to
TWR15)
19.3.7 Status Registers
(STR1 to STR3)
19.6.1 Module Stop Mode
Setting
Section 20 D/A Converter
20.3.1 D/A Data Registers
0 and 1 (DADR0, DADR1)
20.5.1 Module Stop Mode
Setting
Section 21 A/D Converter
21.1 Features
Page
503,
517,
518,
523
519
519
520
520
551
554
557
559
(Error)
Revisions (See Manual for Details)
(Error) Two-way register
(Correction) Bidirectional data register
Description added.
The LPC has the following registers. The settings of XBS
related bits do not affect the operation of this LSI’s LPC.
However, for reasons relating to the configuration of the
program development tool (emulator), when the LPC is used,
bit HI12E in SYSCR2 should not be set to 1. For details, see
section 3.2.2, System Control Register (SYSCR), and section
18.3.1, System Control Register 2 (SYSCR2).
Description added.
The initial values of IDR1 to IDR3 are undefined.
Description added.
The initial values of ODR1 to ODR3 are undefined.
Description added.
The initial values of TWR0 to TWR15 are undefined.
Description added
The initial values of STR1 to STR3 are H'00.
Added.
Description added.
DADR0 and DADR1 are initialized to H'00.
Added.
(Correction)
Deleted.
Module stop mode can be set
Rev. 2.0, 08/02, page 777 of 788

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