HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 470

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

16.4.4
In I
and returns an acknowledge signal. The slave device transmits data.
The master device transmits data containing the slave address and R/: (1: read) in the first frame
following the start condition issuance in master transmit mode, selects the slave device, and then
switches the mode for receive operation.
Receive Operation Using the HNDS Function (HNDS = 1):
Figure 16.11 shows the sample flowchart for the operations in master receive mode (HNDS = 1).
Rev. 2.0, 08/02, page 430 of 788
2
C bus format master receive mode, the master device outputs the receive clock, receives data,
Master Receive Operation
Figure 16.11 Sample Flowchart for Operations in Master Receive Mode
No
No
Read IRIC flag in ICCR
Set HNDS = 1 in ICXR
Set ACKB = 0 in ICSR
Clear IRIC flag in ICCR
Read IRIC flag in ICCR
Clear IRIC flag in ICCR
Set ACKB = 1 in ICSR
Clear IRIC flag in ICCR
Set TRS = 0 in ICCR
Master receive mode
Set TRS = 1 in ICCR
Set BBSY = 0 and
SCP = 0 in ICCR
Last receive?
Read ICDR
Read ICDR
Read ICDR
IRIC = 1?
IRIC = 1?
End
Yes
Yes
No
Yes
[1] Select receive mode.
[2] Start receiving. The first read is a dummy read.
[5] Read the receive data (for the second and subsequent read)
[3] Wait for 1 byte to be received.
[4] Clear IRIC flag.
[6] Set acknowledge data for the last reception.
[7] Read the receive data.
[8] Wait for 1 byte to be received.
[9] Clear IRIC flag.
[10] Read the receive data.
[11] Set stop condition issuance.
(HNDS = 1)
(Set IRIC at the rise of the 9th clock for the receive frame)
Dummy read to start receiving if the first frame is
the last receive data.
Generate stop condition.