HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 105

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HD6432160

Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
3.2.2
SYSCR selects a system pin function, monitors a reset source, selects the interrupt control mode
and the detection edge for NMI, pin location selection, enables or disables register access to the
on-chip peripheral modules, and enables or disables on-chip RAM address space.
Bit
7
6
5
4
3
Bit Name
CS2E
IOSE
INTM1
INTM0
XRST
System Control Register (SYSCR)
Initial Value
0
0
0
0
1
R/W
R/W
R/W
R
R/W
R
Chip Select 2 Enable
Specifies the location of the control pin (&65) of the
host interface together with the FGA20E bit in HICR.
See section 18, Host Interface X-Bus Interface (XBS),
for details.
IOS Enable
Enables or disables $6/,26 pin function in extended
mode.
0: $6 pin
Outputs low when an external area is accessed.
1: ,26 pin
Outputs low when a specified address of addresses
H’(FF)F000 to H’(FF)F7FF is accessed.
These bits select the control mode of the interrupt
controller. For details on the interrupt control modes
and interrupt control select modes 1 and 0, see section
5.6, Interrupt Control Modes and Interrupt Operation.
00: Interrupt control mode 0
01: Interrupt control mode 1
10: Setting prohibited
11: Setting prohibited
External Reset
This bit indicates the reset source. A reset is caused by
an external reset input, or when the watchdog timer
overflows.
0: A reset is caused when the watchdog timer
overflows.
1: A reset is caused by an external reset.
Description
Rev. 2.0, 08/02, page 65 of 788

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