HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 277

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

An example of setting CFS to 1 (basic cycle = resolution (T)
output) is shown as an additional pulse. When CFS is set to 1, the duty ratio of the basic pulse is
determined by the upper eight bits (DA13 to DA6) in DADR, and the position of the additional
pulse is determined by the following six bits (DA5 to DA0) as shown in figure 10.5.
Table 10.4 shows the position of the additional pulse.
Here, the case of DADR = H’0207 (B’0000 0010 0000 0111) is considered. Figure 10.6 shows an
output waveform. Because CFS = 1 and the value of upper eight bits is B’0000 0010, the duty
ratio of the basic pulse is 2/256
Since the value of the following six bits is B’0000 01, the additional pulse is output at the position
of basic pulse No. 63 as shown in table 10.4. Only 1/256
the basic pulse.
DA13 DA12 DA11 DA10 DA9
Figure 10.4 Output Waveform (OS = 1, DADR corresponds to T
t
t
t
H1
f1
H1
t
Figure 10.5 D/A Data Register Configuration when CFS = 1
t
t
H1
f1
H1
Basic pulse duty ratio
= t
+ t
= t
t
+ t
f1
f2
t
f1
H2
f2
H2
= t
= t
+ t
+ t
f3
f3
H3
= ··· = t
H3
= ··· = t
+ ··· + t
+ ··· + t
t
f255
H2
t
f63
H2
a. CFS = 0 [base cycle = resolution (T)
b. CFS = 1 [base cycle = resolution (T)
H255
DA8
H63
= t
= t
(T) of high width.
t
f2
t
f2
f64
f256
+ t
+ t
= T 256
H64
H256
= T 64
DA7
= T
= T
1 conversion cycle
1 conversion cycle
H
H
DA6
t
H3
t
H3
DA5
DA4
Additional pulse position
t
H255
(T) of the additional pulse is added to
t
H63
t
DA3
f255
t
256) and OS to 1 (PWMX inverted
f63
256]
64]
Rev. 2.0, 08/02, page 237 of 788
DA2
t
H256
t
DA1
H64
t
f256
t
f64
DA0
H
)
CFS
1
1