HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 533
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HD6432160
Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6432160.pdf
(829 pages)
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Table 18.2 shows the conditions for setting and clearing the STR flags.
Table 18.2 Set/Clear Timing for STR Flags
Note:* The IBF flag setting and clearing conditions are different when the fast A20 gate is used.
18.4
18.4.1
The host interface is activated by setting the HI12E bit in SYSCR2 to 1 in single-chip mode.
When the host interface is activated, all related I/O ports (data port 3, control ports 8 and 9, and
host interrupt request port 4) become dedicated host interface ports. Setting the CS3E bit and
CS4E bit to 1 enables the number of host interface channels to be extended to four, and makes the
channel 3 and 4 related I/O port (part of port B for control and host interrupt requests) a dedicated
host interface port.
Flag
C/'
IBF*
OBF
For details see table 18.5.
Operation
Host Interface Activation
Setting Condition
Rising edge of host’s write signal
(,2:) when HA0 is high
Rising edge of host’s write signal
(,2:) when writing to IDR1
Falling edge of slave’s internal write
signal when writing to ODR1
Clearing Condition
Rising edge of host’s write signal (,2:) when
HA0 is low
Falling edge of slave’s internal read signal when
reading IDR1
Rising edge of host’s read signal (,25) when
reading ODR1
Rev. 2.0, 08/02, page 493 of 788
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