HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 275

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Table 10.3 summarizes the relationships between the CKS, CFS, and OS bit settings and the
resolution, base cycle, and conversion cycle. The PWM output remains fixed unless DADR
contains at least a certain minimum value.
Table 10.3 Settings and Operation (Examples when ø = 10 MHz)
Note:* This column indicates the conversion cycle when specific DADR bits are fixed.
CKS
0
1
Resolution
T (µs)
0.1
0.2
CFS
0
1
0
1
Base
Cycle (µs)
6.4
25.6
12.8
51.2
Conversion
Cycle (µs)
1638.4
3276.8
T
T
1. Always low (or high)
2. (Data value)
1. Always low (or high)
2. (Data value)
1. Always low (or high)
2. (Data value)
1. Always low (or high)
2. (Data value)
L
H
(if OS = 0)
(if OS = 1)
(DADR = H'0001 to
H'03FD)
(DADR = H'0401 to
H'FFFD)
(DADR = H'0003 to
H'00FF)
(DADR = H'0103 to
H'FFFF)
(DADR = H'0001 to
H'03FD)
(DADR = H'0401 to
H'FFFD)
(DADR = H'0003 to
H'00FF)
(DADR = H'0103 to
H'FFFF)
T
T
T
T
Rev. 2.0, 08/02, page 235 of 788
Precisi-
on
(Bits)
14
12
10
14
12
10
14
12
10
14
12
10
Fixed DADR Bits
3 2 1 0
0 0 0 0 102.4
0 0 0 0 102.4
0 0 0 0 204.8
0 0 0 0 204.8
Bit Data
0 0 409.6
0 0 409.6
0 0 819.2
0 0 819.2
Conversion
Cycle* (µs)
1638.4
1638.4
3276.8
3276.8