HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 800

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Rev. 2.0, 08/02, page 760 of 788
Item
Section 3 MCU Operating
Modes
3.2.2 System Control
Register (SYSCR)
Section 4 Exception
Handling
4.7 Usage Note
Figure 4.3 Operation
when SP Value is Odd
Section 5 Interrupt
Controller
5.1 Features
Figure 5.1 Block Diagram
of Interrupt Controller
5.3.1 Interrupt Control
Registers A to C (ICRA to
ICRC)
5.3.6 IRQ Status Register
(ISR)
Page
66
84
86
88
92
Revisions (See Manual for Details)
Description of bit 1 amended.
(Error) keyboard buffer controller
(Correction) keyboard matrix interrupt
Corrected.
(Error)
(Error) The ICR registers set interrupt control levels for
(Correction) The ICR registers set interrupt control levels for
Bits 7 to 0
R/W
R/(W)*
Notes:
SP
WUE input
KIN input
SP set to H'FFEFFF
2
interrupts other than NMI.
Description
When interrupt exception handling is executed when low-level
detection is set and ,54Q input is high (n = 7 to 0)*
When IRQn interrupt exception handling is executed when falling-
edge, rising-edge, or both-edge detection is set*
1.
2.
interrupts other than NMI and address breaks.
TRAPA instruction executed
KMIMR
When a product, in which a DTC is incorporated, is used,
the corresponding flag bit is not automatically cleared
even when exception handing is executed. For details,
refer to section 5.8.4, Setting on a Product Incorporating
DTC.
Only 0 can be written, for flag clearing.
KIM and WUE
SP
input
WUEMR
Data saved above SP
CCR
PC
WUE input
KIN input
MOV.B R1L, @-ER7 executed
(Correction)
SP
Contents of CCR lost
1
R1L
1
PC
KMIMR
KIN and WUE
input
H'FFEFFA
H'FFEFFB
H'FFEFFC
H'FFEFFD
H'FFEFFF
WUEMR
Address