HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 473

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Figure 16.14 Sample Flowchart for Operations in Master Receive Mode
No
No
No
Set BBSY= 0 and SCP= 0
Wait for one clock pulse
Clear IRIC flag in ICCR
Clear IRIC flag in ICCR
Clear IRIC flag in ICCR
Set HNDS = 0 in ICXR
Set ACKB = 0 in ICSR
Clear IRIC flag in ICCR
Set WAIT = 1 in ICMR
Read IRIC flag in ICCR
Set ACKB = 1 in ICSR
Clear IRIC flag in ICCR
Read IRIC flag in ICCR
Set WAIT = 0 in ICMR
Set TRS = 0 in ICCR
Master receive mode
Set TRS = 1 in ICCR
Last receive?
Read ICDR
Read ICDR
Read ICDR
Read ICDR
IRTR = 1?
(receiving multiple bytes) (WAIT = 1)
IRIC = 1?
IRTR=1?
IRIC=1?
in ICCR
End
Yes
Yes
Yes
No
No
Yes
Yes
[16] Read the last receive data.
[17] Generate stop condition
[1] Select receive mode.
[2] Start receiving. The first read
[3] Wait for a receive wait
[5] Read the receive data.
[6] Clear IRIC flag.
[7] Set acknowledge data for the last reception.
[8] Wait for TRS setting
[9] Set TRS for stop condition issuance
[10] Read the receive data.
[11] Clear IRIC flag. (to end the wait insertion)
[12] Wait for a receive wait
[13] Determine end of reception
[14] Clear IRIC.
[15] Clear wait mode.
[4] Determine end of reception
(Set IRIC at the fall of the 8th clock) or,
Wait for 1 byte to be received
(Set IRIC at the rise of the 9th clock)
(Set IRIC at the fall of the 8th clock) or,
Wait for 1 byte to be received
(Set IRIC at the rise of the 9th clock)
(to end the wait insertion)
(to end the wait insertion)
is a dummy read.
Clear IRIC flag.
( IRIC flag should be cleared to 0
after setting WAIT = 0.)
Rev. 2.0, 08/02, page 433 of 788