HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 428
HD6432160
Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6432160.pdf
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Reception: Before making a transition to module stop, software standby, watch, sub-active, or
sub-sleep mode, stop reception (RE = 0). RSR, RDR, and SSR are reset. If a transition is made
during data reception, the data being received will be invalid.
To receive data in the same reception mode after mode cancellation, set RE to 1, and then start
reception. To receive data in a different reception mode, initialize the SCI first.
Figure 15.27 shows a sample flowchart for mode transition during reception.
Rev. 2.0, 08/02, page 388 of 788
Figure 15.24 Sample Flowchart for Mode Transition during Transmission
Make transition to software standby mode etc.
Cancel software standby mode etc.
Change operating mode?
Read TEND flag in SSR
All data transmitted?
Start transmission
Transmission
Initialization
TEND = 1
Yes
Yes
Yes
TE = 0
[2]
No
No
No
TE = 1
[1]
[3]
[1] Data being transmitted is lost
[2] Also clear TIE and TEIE to 0
[3] Module stop, watch, sub-active,
halfway. Data can be normally
transmitted from the CPU by
setting TE to 1, reading SSR,
writing to TDR, and clearing
TDRE to 0 after mode
cancellation; however, if the DTC
has been initiated, the data
remaining in DTC RAM will be
transmitted when TE and TIE are
set to 0.
when they are 1.
and sub-sleep modes are
included.
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